Amplifier circuits for medical equipment, biosensors, tape drives and others are required to perform an amplification operation of several mV in a signal level and several hundreds MHz from the direct current in an operation bandwidth, and also need to amplify a signal of the wide-band frequency range in a low-noise level. The amplifier circuit has high input offset voltage generated by device variation and also high noise level on a low-band side due to the effect of the 1/f noise, and in particular, the characteristics of the amplifier circuit in a low frequency range are deteriorated. In general, as the technology for achieving the low offset voltage and the reduction of the 1/f noise in the amplifier circuit, the following conventional technologies have been known.
For example, FIG. 10 shows an amplifier circuit disclosed in Japanese Patent Application Laid-Open Publication No. 7-231227 (Patent Document 1) in which an output offset voltage is suppressed to be small in a wideband amplifier circuit. In the configuration thereof, an amplifier circuit 1001 with a high gain G1 and a low offset voltage is provided on a preceding stage and an amplifier circuit 1002 with a low gain G2 and a high offset voltage and operating in a wide band is provided on a subsequent stage, these circuits are connected in cascade, and negative feedback is applied from an output of the amplifier circuit 1002 to the amplifier circuit 1001. Hence, the offset voltage of the amplifier circuit 1002 of the subsequent stage is compressed by G2/G1 by the gain of the amplifier circuit 1001 of the preceding stage. Further, the gain is decided by a ratio of the negative feedback resistance on the low-band side and decided by the gain G2 of the amplifier circuit 1002 of the subsequent stage on the high-band side. Consequently, if a ratio of negative feedback resistance {R3(R1+R2)}/{R2(R3+R4)} is set so as to be equal to the gain G2 of the amplifier circuit 1002 of the subsequent stage, a constant gain can be obtained over the wide band.
Furthermore, for example, FIG. 11 shows an amplifier circuit disclosed in “AD8551/AD8552/AD8554”, [Online], [Retrieved on May 31, 2006], Internet <URL: http://www.analog.com/UploadedFiles/Data_sheets/AD8551—8552—855 4.pdf> (Non-Patent Document 1) in which a low offset voltage is achieved by using an auto-zero operation function. The configuration thereof includes two amplifier circuits such as a main amplifier circuit 1101 and a nulling amplifier circuit 1102 that compensates the offset voltage of the main amplifier circuit 1101, and each of the amplifier circuits 1101 and 1102 is a summing amplifier circuit having three input terminals. The amplifier circuit of FIG. 11 has two operation modes such as an auto-zero operation and an input signal amplification operation decided by two sets of switch operations. At the time of the auto-zero operation, each switch is connected to the Φ1 side, and an offset compensation by the auto-zero function of the nulling amplifier circuit 1102 is performed. Next, at the time of the input signal amplification operation, each switch is connected to the Φ2 side, and the input signal is amplified by the product of the gains of the offset-compensated nulling amplifier circuit 1102 and the main amplifier circuit 1101, and both the offset voltages of the main amplifier circuit and the nulling amplifier circuit are compressed by the gain of the nulling amplifier circuit.